View PI74FCT646T_1126141.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT646T/648T/651T/652T (25 Series PI74FCT2646T/2652T
PI74FCT646/648/651/652T (25 Series) P174FCT2646T/2652T OCTAL REGISTERED TRANSCEIVERS
Fast CMOS Octal Registered Transceivers
Product Features:
* PI74FCT646T/648T/651T/652T/2646T/2652T is pin compatible with bipolar FASTTM Series at a higher speed and lower power consumption * 25 series resistor on all outputs (FCT2XXX only) * TTL input and output levels * Low ground bounce outputs * Extremely low static power * Hysteresis on all inputs * Industrial operating temperature range: -40C to +85C * Packages available: - 24-pin 300 mil wide plastic DIP (P) - 24-pin 150 mil wide plastic QSOP (Q) - 24-pin 150 mil wide plastic TQSOP (R) - 24-pin 300 mil wide plastic SOIC (S) * Device models available upon request
Product Description:
Pericom Semiconductor's PI74FCT series of logic circuits are produced in the Company's advanced 0.6/0.8 micron CMOS technology, achieving industry leading speed grades. All PI74FCT2XXX devices have a built-in 25-ohm series resistor on all outputs to reduce noise because of reflections, thus eliminating the need for an external terminating resistor. The PI74FCT646T/648T/651T/652T and PI74FCT2646T/2652T are designed with a bus transceiver with 3-state D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. The PI74FCT651/652T/2652T utilize GAB and GBA signals to control the transceiver functions. The PI74FCT646/2646T/648T utilize the enable control (G) and direction pins (DIR) to control the transceiver functions. SAB and SBA control pins are used to select either real-time or stored data transfer. The circuitry used for select control will eliminate the typical decoding glitch that occurs in a multiplexer during the transition between real-time and stored data. A low input level selects real-time data and a high selects stored data. The PI74FCT646T is a non-inverting option of the PI74FCT648T. The PI74FCT652T is a non-inverting option of the PI74FCT651T.
Logic Block Diagram
PI74FCT651/652 ONLY GBA PI74FCT646/648 ONLY G GAB
DIR CPBA SBA CPAB SAB
1 OR 8 CHANNELS
B REG 0D C0 B0
A REG A0 0D C0 PI74FCT651/652 ONLY 646/652 ONLY
646/652 ONLY
TO 7 OTHER CHANNELS
1
PS2022A 03/11/96
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT646/648/651/652T (25 Series) P174FCT2646T/2652T OCTAL REGISTERED TRANSCEIVERS Product Pin Description
Pin Name A0-A7 B0-B7 CPAB, CPBA SAB, SBA DIR, G GAB, GBA GND VCC Description Data Register A Inputs Data Register B Outputs Data Register B Inputs Data Register A Outputs Clock Pulse Inputs Output Data Source Select Inputs Output Enable Inputs (646/648/2646) Output Enable Inputs (651/652/2652) Ground Power
DATA I/O(2)
PI74FCT646/648T Product Pin Configuration
CPAB SAB DIR A0 A1 A2 A3 A4 A5 A6 A7 GND 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 Vcc CPBA SBA G B0 B1 B2 B3 B4 B5 B6 B7
PI74FCT651/652T Product Pin Configuration
CPAB SAB GAB A0 A1 A2 A3 A4 A5 A6 A7 GND 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 Vcc CPBA SBA GBA B0 B1 B2 B3 B4 B5 B6 B7
24-PIN P24 Q24 R24 S24
24-PIN P24 Q24 R24 S24
PI74FCT646/648/2646T Truth Table
PI74FCT646/2646T Function/Operation Isolation Store A and B Data Real Time B Data to A Bus Stored B Data to A Bus Real Time A Data to B Bus Stored A Data to B Bus PI74FCT648T Function/Operation Isolation Store A and B Data Real Time B Data to A Bus Stored B Data to A Bus Real Time A Data to B Bus Stored A Data to B Bus
Inputs
G H H L L L L
DIR X X L L H H
CPAB CPBA SAB H or L H or L X X X X X X H or L X X X L H or L X H
SBA X X L H X X
A0-A7 Input Output Input
B0-B7 Input Input Output
PI74FCT651/652/2652T Truth Table
PI74FCT651T Function/Operation Isolation Store A and B Data Store A, Hold B Store A in Both Registers(3) Hold A, Store B Store B in Both Registers(4) Real Time B Data to A Bus Stored B Data to A Bus Real Time A Data to B Bus Stored A Data to B Bus Stored A Data to B Bus and Stored B Data to A Bus 1. PI74FCT652/2652T Function/Operation GAB Isolation L Store A and B Data L Store A, Hold B X Store A in Both Registers H Hold A, Store B L Store B in Both Registers L Real Time B Data to A Bus L Stored B Data to A Bus L Real Time A Data to B Bus H Stored A Data to B Bus H Stored A Data to B Bus and H Stored B Data to A Bus
Inputs DATA I/O(2)
GBA H H H H X L L L H H L
CPAB H or L H or L X X X H or L H or L
CPBA SAB H or L X X H or L X X(2) X X X X H or L X X L X H H or L H
SBA A0-A7 B0-B7 X Input Input X X Input Unspecified(1) X Input Output (1) X Unspecified Input X(2) Output Input L Output Input H X Input Output X H Output Output
2. 3. 4.
The data output functions may be enabled or disabled by various signals at the GAB or GBA inputs. Data input functions are always enabled, i.e., data at the bus pins will be stored on every low-to-high transition on the clock inputs. Select control = L: clocks can occur simultaneously. Select control = H: clocks must be staggered in order to load both registers. A in B Register B in A Register
2
PS2022A 03/11/96
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT646/648/651/652T (25 Series) P174FCT2646T/2652T OCTAL REGISTERED TRANSCEIVERS
REAL-TIME TRANSFER BUS B TO A
REAL-TIME TRANSFER BUS A TO B
BUS A
BUS B
BUS A
BUS B
646/648/ 2646
DIR L
G L
CPAB CPBA X X
SAB X SAB X
SBA L SBA L
646/648/ 2646
DIR H
G L
CPAB CPBA X X
SAB L SAB L
SBA X SBA X
651/652/ GAB GBA CPAB CPBA 2652 L L X X STORAGE FROM A AND/OR B
651/652/ GAB GBA CPAB CPBA 2652 H H X X TRANSFER STORES DATA TO A AND/OR B
BUS A
BUS B
BUS A
BUS B
646/648/ 2646
DIR H L X
G L L H
CPAB CPBA X X
SAB X X X SAB X X X
SBA X X X SBA X X X
646/648(1) DIR 2646 L H
G L L
CPAB CPBA X H or L H or L X
SAB X H SAB H
SBA H X SBA H
651/652/ GAB GBA CPAB CPBA 2652 X H X L X X L H
651/652/ GAB GBA CPAB CPBA 2652 H L H or L H or L
1. Note: The FCT646/2646 cannot transfer data to A bus and B bus simultaneously.
3
PS2022A 03/11/96
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT646/648/651/652T (25 Series) P174FCT2646T/2652T OCTAL REGISTERED TRANSCEIVERS
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ................................................................. -65C to +150C Ambient Temperature with Power Applied ................................. -40C to +85C Supply Voltage to Ground Potential (Inputs & Vcc Only) .......... -0.5V to +7.0V Supply Voltage to Ground Potential (Outputs & D/O Only) ....... -0.5V to +7.0V DC Input Voltage ......................................................................... -0.5V to +7.0V DC Output Current ................................................................................... 120 mA Power Dissipation ......................................................................................... 0.5W Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
DC Electrical Characteristics (Over the Operating Range, TA = -40C to +85C, VCC = 5.0V 5%)
Parameters Description VOH VOL VOL VIH VIL IIH IIL IOZH IOZL VIK IOFF IOS VH Output HIGH Voltage Output LOW Current Output LOW Current Input HIGH Voltage Input LOW Voltage Input HIGH Current Input LOW Current High Impedance Output Current Clamp Diode Voltage Power Down Disable Short Circuit Current Input Hysteresis VCC = Min., IIN = -18 mA VCC = GND, VOUT = 4.5V VCC = Max.(3), VOUT = GND -- -60 Test Conditions(1) VCC = Min., VIN = VIH or VIL VCC = Min., VIN = VIH or VIL VCC = Min., VIN = VIH or VIL Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VCC = Max. VCC = MAX. VIN = VCC VIN = GND VOUT = 2.7V VOUT = 0.5V -0.7 -- -120 200 IOH = -15.0 mA IOL = 64 mA IOL = 12 mA (25 Series) 2.0 0.8 1 -1 1 -1 -1.2 100 Min. Typ(2) Max. Units 2.4 3.0 0.3 0.3 0.55 0.50 V V V V V A A A A V A mA mV
Capacitance (TA = 25C, f = 1 MHz)
Parameters(4) CIN COUT Description Input Capacitance Output Capacitance Test Conditions VIN = 0V VOUT = 0V Typ 6 8 Max. 10 12 Units pF pF
Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5.0V, +25C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This parameter is determined by device characterization but is not production tested.
4
PS2022A 03/11/96
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT646/648/651/652T (25 Series) P174FCT2646T/2652T OCTAL REGISTERED TRANSCEIVERS
Power Supply Characteristics
Parameters Description ICC ICC ICCD Quiescent Power Supply Current Supply Current per Input @ TTL HIGH Supply Current per Input per MHz(4) VCC = Max. VCC = Max., VCC = Max., Outputs Open G = DIR = GND or GAB = GBA = GND One Input Toggling 50% Duty Cycle VCC = Max., Outputs Open fCP = 10 MHZ 50% Duty Cycle G = DIR = GND or GAB = GBA = GND fI = 5 MHZ One Bit Toggling VCC = Max., Outputs Open fCP = 10 MHZ 50% Duty Cycle G = DIR = GND or GAB = GBA = GND Eight Bits Toggling fI = 2.5 MHZ 50% Duty Cycle Test Conditions(1) VIN = GND or VCC VIN = 3.4V(3) VIN = VCC VIN = GND Min. Typ(2) 0.1 0.5 0.15 Max. 500 2.0 0.25 Units A mA mA/ MHz
IC
Total Power Supply Current(6)
VIN = VCC VIN = GND VIN = 3.4V VIN = GND
1.5
3.5(5)
mA
2.0
5.5(5)
VIN = VCC VIN = GND VIN = 3.4V VIN = GND
3.8
7.3(5)
6.0
16.3(5)
Notes: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device. 2. Typical values are at Vcc = 5.0V, +25C ambient. 3. Per TTL driven input (VIN = 3.4V); all other inputs at Vcc or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested. 6. IC =IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCP/2 + fINI) ICC = Quiescent Current ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fI = Input Frequency NI = Number of Inputs at fI All currents are in milliamps and all frequencies are in megahertz.
5
PS2022A 03/11/96
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT646/648/651/652T (25 Series) P174FCT2646T/2652T OCTAL REGISTERED TRANSCEIVERS
PI74FCT646/2646T Switching Characteristics over Operating Range
646T/2646T Com. 646AT/2646AT Com. Max Min Max Min 646CT Com. Max Min 646DT Com. Max Unit
Parameters tPLH tPHL tPZH tPZL tPHZ tPLZ tPLH tPHL tPLH tPHL tSU tH tW
Description Propagation Delay Bus to Bus Output Enable Time G, DIR to Bus Output Disable Time(3) G, DIR to Bus Propagation Delay Clock to Bus Propagation Delay SBA or SAB to Bus Setup Time HIGH or LOW, BUS to Clock Hold Time HIGH or LOW, Bus to Clock Clock Pulse Width(3) HIGH or LOW
Conditions(1) CL = 50 pF RL = 500
Min
2.0 2.0 2.0 2.0 2.0 4.0 2.0 6.0
7.5 14.0 9.0 9.0 9.5 -- -- --
2.0 2.0 2.0 2.0 2.0 2.0 1.5 5.0
6.3 9.8 6.3 6.3 7.7 -- -- --
1.5 1.5 1.5 1.5 1.5 2.0 1.5 5.0
5.4 7.8 6.3 5.7 6.2 -- -- --
1.5 1.5 1.5 1.5 1.5 2.0 1.5 5.0
4.8 7.3 6.3 5.2 5.8 -- -- --
ns ns ns ns ns ns ns ns
PI74FCT648T Switching Characteristics over Operating Range
648T Com. 648AT Com. Max Min Max Min 648CT Com. Max Min 648DT Com. Max Unit
Parameters tPLH tPHL tPZH tPZL tPHZ tPLZ tPLH tPHL tPLH tPHL tSU tH tW
Description Propagation Delay Bus to Bus Output Enable Time G, DIR to Bus Output Disable Time(3) G, DIR to Bus Propagation Delay Clock to Bus Propagation Delay SBA or SAB to Bus Setup Time HIGH or LOW, BUS to Clock Hold Time HIGH or LOW, Bus to Clock Clock Pulse Width(3) HIGH or LOW
Conditions(1) CL = 50 pF RL = 500
Min
2.0 2.0 2.0 2.0 2.0 4.0 2.0 6.0
7.5 14.0 9.0 9.0 9.5 -- -- --
2.0 2.0 2.0 2.0 2.0 2.0 1.5 5.0
6.3 9.8 6.3 6.3 7.7 -- -- --
1.5 1.5 1.5 1.5 1.5 2.0 1.5 5.0
5.4 7.8 6.3 5.7 6.2 -- -- --
1.5 1.5 1.5 1.5 1.5 2.0 1.5 5.0
4.8 7.3 6.3 5.2 5.8 -- -- --
ns ns ns ns ns ns ns ns
Notes: 1. See test circuit and wave forms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. This parameter guaranteed but not production tested.
6
PS2022A 03/11/96
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT646/648/651/652T (25 Series) P174FCT2646T/2652T OCTAL REGISTERED TRANSCEIVERS
PI74FCT651T Switching Characteristics over Operating Range
651T Com.
(1)
651AT Com. Max Min Max
651CT Com. Min Max
651DT Com. Min Max Unit
Parameters tPLH tPHL tPZH tPZL tPHZ tPLZ tPLH tPHL tPLH tPHL tSU tH tW
Description Propagation Delay Bus to Bus Output Enable Time GBA, GAB to Bus Output Disable Time(3) GBA, GAB to Bus Propagation Delay Clock to Bus Propagation Delay SBA or SAB to Bus Setup Time HIGH or LOW, BUS to Clock Hold Time HIGH or LOW, Bus to Clock Clock Pulse Width(3) HIGH or LOW
Conditions CL = 50 pF RL = 500
Min
2.0 2.0 2.0 2.0 2.0 4.0 2.0 6.0
9.0 12.5 9.0 9.0 9.5 -- -- --
2.0 2.0 2.0 2.0 2.0 2.0 1.5 5.0
6.3 9.8 6.3 6.3 7.7 -- -- --
1.5 1.5 1.5 1.5 1.5 2.0 1.5 5.0
5.4 7.8 6.3 5.7 6.2 -- -- --
1.5 1.5 1.5 1.5 1.5 2.0 1.5 5.0
4.8 7.3 6.0 5.2 5.8 -- -- --
ns ns ns ns ns ns ns ns
PI74FCT652/2652T Switching Characteristics over Operating Range
652T/2652T Com.
(1)
652AT/2652AT Com.
652CT Com.
652DT Com.
Parameters tPLH tPHL tPZH tPZL tPHZ tPLZ tPLH tPHL tPLH tPHL tSU tH tW
Description Propagation Delay Bus to Bus Output Enable Time GBA, GAB to Bus Output Disable Time(3) GBA, GAB to Bus Propagation Delay Clock to Bus Propagation Delay SBA or SAB to Bus Setup Time HIGH or LOW, BUS to Clock Hold Time HIGH or LOW, Bus to Clock Clock Pulse Width(3) HIGH or LOW
Conditions CL = 50 pF RL = 500
Min
Max
Min
Max
Min
Max
Min
Max
Unit
2.0 2.0 2.0 2.0 2.0 4.0 2.0 6.0
9.0 12.5 9.0 9.0 9.5 -- -- --
2.0 2.0 2.0 2.0 2.0 2.0 1.5 5.0
6.3 9.8 6.3 6.3 7.7 -- -- --
1.5 1.5 1.5 1.5 1.5 2.0 1.5 5.0
5.4 7.8 6.3 5.7 6.2 -- -- --
1.5 1.5 1.5 1.5 1.5 2.0 1.5 5.0
4.8 7.3 6.0 5.2 5.8 -- -- --
ns ns ns ns ns ns ns ns
Notes: 1. See test circuit and wave forms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. This parameter is guaranteed but not production tested.
Pericom Semiconductor Corporation 2380 Bering Drive * San Jose, CA 95131 * 1-800-435-2336 * Fax (408) 435-1100 * http://www.pericom.com
7
PS2022A 03/11/96

▲Up To Search▲

Price & Availability of PI74FCT646T

	To Download PI74FCT646T Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .